INTERNATIONAL JOURNAL FOR ADVANCE RESEARCH IN ENGINEERING AND TECHNOLOGY

Volume 2, Issue XII, Dec. 2014

Paper No Article PDF
1. DESIGN AND IMPLEMENTATION OF 256 BIT CMOS MEMORY CELL AT 45NM USING CADENCE VIRTUOSO
By: Avinay Pandey, Mr. Ghanshyam Jangid
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2. TO DESIGN AN I2C MASTER PROTOCOL IN VHDL FOR DESIRED AND CHANGING BUS CLOCK SPEED E.g. 100 KBPS AND 400 KBPS
By: Mudit Vaish, Twinkle Gupta, Rakesh Jain
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3. DESIGN OF A LOW POWER 2T SRAM CELL USING TRANSMISSION GATE
By: Digvijay Singh Deora, Ghanshyam
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4. Development of Hilly Regions Using Preventing Migration with Help of MSME
By: Mr. Bhavendra Chandra, Dr. Arun Kumar
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5. Palm Vein Recognition with Fuzzy-Neuro Technique
By: Gitanjali Sikka, Er. Vikas Wasson
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6. ICA an Efficient Algorithm for Feature Extraction
By: Divya Agarwal
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